(a) Field of the Invention
The present invention relates to a semiconductor device and a method of manufacturing the semiconductor device, and more particularly to a method of manufacturing a transistor of the semiconductor device.
(b) Discussion of the Related Art
Generally, a semiconductor device includes a plurality of transistors. The transistors include device regions, each having a source/drain region and a gate electrode. The device regions are separated from one another by a device isolation method such as a LOCOS (local oxidation of silicon) or STI (shallow trench isolation) method.
A method of manufacturing a conventional semiconductor device transistor is described below.
A gate insulation layer and a polysilicon layer are sequentially formed on a semiconductor substrate to form the transistor of the semiconductor device. A gate electrode is formed by etching the polysilicon layer and the gate insulation layer using a mask formed on the polysilicon layer.
Low-concentration impurities are ion-implanted into a semiconductor substrate using the gate electrode as a mask. A sidewall is formed by performing a photolithography and etching process for an oxide layer and nitride layer which are sequentially formed on the gate electrode and the semiconductor substrate. Here, a high concentration junction region is formed by ion-implanting high-concentration impurities into the semiconductor substrate using the sidewall and the gate electrode as a mask. The high concentration junction region includes a source/drain junction region.
After depositing a metal layer on the semiconductor substrate including the gate electrode and the source/drain region, a metal silicide is formed by performing a heat treatment at a predetermined temperature on the metal layer.
A salicide forming process is used for forming the silicide. According to the salicide forming process, the silicide is formed only on the source/drain region including silicon and the gate electrode including polysilicon, by selectively etching the metal layer on the oxide layer other than at the gate and source/drain region. The metal layer to be etched is a layer that does not react with silicon. Such a silicide is used to decrease resistance, because low resistance increases the speed at which the semiconductor device can operate.
However, even when the size of the transistor is decreased due to higher integration in the semiconductor device, the transistor still occupies a larger than desired volume due to its horizontal structure, which includes the source/drain region at both sides of the gate electrode.